T1 - (SS) System Synthesis:
- High-level, behavioral, register-transfer, logic and physical circuit synthesis.
- Arithmetic, signal processing and vector processing units.
- Graphics processing units and hardware accelerators.
- Memory design.
- Communication architecture and protocols.
- Specific circuits and processors.
- Multi-objective optimization observing power, performance, communication traffic, interconnect architecture, layout, technology, reliability, robustness, security, testability and other issues.
- Management of parallel computational resources, memory allocation and hierarchy.
- Hardware/software co-design.
- Mapping of applications and architectures.
- Algorithm architecture matching.
- Transaction level modeling and higher-level modeling.
- Virtual system prototyping.
- Design space exploration.
- Synthesis of asynchronous and dataflow driven systems.
T2 - (MPSoC) Systems-on-a-chip and Multiprocessor SoCs:
- Generic system platforms and platform-based design.
- CMP, SMP, SMT, DSP and VLIW (multi)processor architecture and enhancements.
- Networks on chip.
- Power, energy, timing, predictability and other quality issues.
- IP design, standardization and reuse.
- Virtual components.
- Compiler assisted ASIP and MPSoC generation and configuration.
- Hardware support for embedded kernels.
- Embedded software features.
- SoC design environments for embedded systems, sequential and parallel applications
- Static, run-time and dynamic optimizations of embedded systems.
- Performance metrics.
T3 - (RC) Programmable/re-configurable architectures:
- Processor, communication, memory and software architectures with focus on application specific and/or embedded computing.
- Systems on re-configurable chip.
- System FPGAs and structured ASICs and co-processors.
- Processing arrays.
- Programmable fabrics.
- novel logic block architectures, combination of FPGA fabric and system blocks (DSP, processors, memories, etc.).
- Compiled accelerators, reconfigurable computing, adaptive computing devices, systems and software.
- Optimization of FPGA-based cores.
- Novel design algorithms for FPGA features.
- Embedded software.
- CAD for placement, routing, retiming, logic optimization, technology mapping, system-level partitioning, logic generators, testing and verification.
- CAD for modeling, analysis and optimization of timing and power.
- High-level models and tools for FPGAs.
- Rapid prototyping.
T4 - (SMVT) System, hardware and embedded-software specification, modeling, verification and test:
- Design and verification languages.
- Functional, structural and parametric specification and modeling.
- Simulation, emulation, prototyping, and testing at the system, register-transfer, logic and physical levels.
- Co-simulation and co-verification.
T5 - (APP) Applications of (embedded) digital systems with emphasis on demanding and new applications in fields such as:
- (Wireless) communication and networking.
- Measurement and control.
- Health-care and medicine.
- Military, space, avionics and automotive systems.
- Surveillance and security.
- Networked and electronic media.
- Multimedia design.
- Real time signal processing hardware.
- Digital video technology.
- Consumer electronics.
- Ambient intelligence.
- Wireless sensor networks.
- Ubiquitous, wearable and implanted systems.
T6 - (ET) Emerging technologies, system paradigms and design methodologies:
- Deep sub-micron VLSI design issues.
- Digital design in 3D layouts.
- Optical, bio, nano and quantum technologies and computing.
- Self-organizing and self-adapting systems.