{"id":3193,"date":"2016-03-16T07:26:04","date_gmt":"2016-03-16T07:26:04","guid":{"rendered":"https:\/\/www.prueba.local\/iuma-seminar-series-fpga-based-hardware-accelerators-and-hybrid-systems\/"},"modified":"2021-02-01T10:29:29","modified_gmt":"2021-02-01T10:29:29","slug":"iuma-seminar-series-fpga-based-hardware-accelerators-and-hybrid-systems","status":"publish","type":"post","link":"https:\/\/www.iuma.ulpgc.es\/en\/iuma-seminar-series-fpga-based-hardware-accelerators-and-hybrid-systems\/","title":{"rendered":"IUMA Seminar Series FPGA-Based Hardware Accelerators and Hybrid Systems"},"content":{"rendered":"<p><font face=\"trebuchet ms,geneva\" size=\"2\"><img loading=\"lazy\" decoding=\"async\" width=\"104\" height=\"138\" align=\"right\" style=\"width: 104px; height: 138px;\" src=\"\/images\/stories\/UltimasNoticias\/christian_de_schryver.png\" border=\"0\" vspace=\"5\" hspace=\"5\" \/>El pr\u00f3ximo viernes 18 de marzo a las 9:30 en el Sal\u00f3n de Actos del Edificio de Electr\u00f3nica y Telecomunicaci\u00f3n, el <strong>Dr. Christian De Schryver -TU Kaiserslautern<\/strong>, Alemania&nbsp; impartir\u00e1 un seminario sobre <strong>&quot;Aceleradores hardware basados en FPGA y sistemas h\u00edbridos&quot;<\/strong>.<\/font><\/p>\n<p><font face=\"trebuchet ms,geneva\" size=\"2\"> El seminario ser\u00e1 en ingl&eacute;s con el siguiente contenido:<\/font><\/p>\n<p><font face=\"trebuchet ms,geneva\" size=\"2\">9:30 &ndash; 10:15. Unit 1: High-Level FPGA Design Tools<br \/>&nbsp;&nbsp; 1. CHPC work and experience with Xilinx Vivado HLS, Xilinx SDAccel, and Maxeler OpenSPL.<br \/>&nbsp;&nbsp; 2. Examples. Results and issues found while working with the tools. Comments on the state-of-production and how we would recommend the tools.<\/font><\/p>\n<p><font face=\"trebuchet ms,geneva\" size=\"2\">10:15 &ndash; 11:00. Unit 2: Hybrid Platform Design and the Agile FPGA Design Flow<br \/>&nbsp;&nbsp; 1. Novel agile FPGA platform design flow.<br \/>&nbsp;&nbsp; 2. Example: a hybrid platform for financial simulations.<br \/>&nbsp;&nbsp; 3. Comparison against traditional FPGA design flow and comments on the pros and cons of our approach.<\/font><\/p>\n<p><font face=\"trebuchet ms,geneva\" size=\"2\">11:00 &ndash; 11:30. Break<\/font><\/p>\n<p><font face=\"trebuchet ms,geneva\" size=\"2\">11:30 &ndash; 12:30. Unit 3: Custom-Precision FPGA designs<br \/>&nbsp;&nbsp; 1. CHPC work on custom-precision floating point data paths for FPGAs.<br \/>&nbsp;&nbsp; 2. Methodology for optimizing precisions for a target result accuracy with an example application, and how to tune operators to those.<br \/>&nbsp;&nbsp; 3. Ongoing and future work. Current research challenges in this domain.<\/font><\/p>\n<p><font face=\"trebuchet ms,geneva\" size=\"2\">12:30 &ndash; 13:30. Unit 4: Flexible RIVER Image Processing Platform<br \/>&nbsp;&nbsp; 1. Hybrid CPU\/FPGA image processing system for object detection (industry project).<br \/>&nbsp;&nbsp; 2. Overview of the concept. Run-time flexibility introduced on various layers.<\/font><\/p>\n<p><a class=\"doclink\" href=\"index.php?option=com_docman&#038;task=doc_download&#038;gid=369\"><font face=\"trebuchet ms,geneva\" size=\"2\"><img decoding=\"async\" alt=\"icon\" src=\"components\/com_docman\/themes\/default\/images\/icons\/16x16\/pdf.png\" border=\"0\" \/>&nbsp;P\u00f3ster Aceleradores hardware basados en FPGA y sistemas h\u00edbridos<\/font><\/a>&nbsp;<\/p>\n<p> <!--more--> <font face=\"trebuchet ms,geneva\" size=\"2\">Christian De Schryver graduated in Information Technology and received a PhD in Electrical Engineering, both from the University of Kaiserslautern, Germany. At this place, he is currently a Post-Doc and Senior Member of the Customized High Performance Computing (CHPC) research team within the Microelectronic Systems Design Research Group headed by Prof. Dr. Norbert Wehn. His research interests are design methodologies for application-tailored heterogeneous execution platforms, hardware accelerators for supercomputing applications (in particular finance and big data processing), and system-level design flows.<\/font><\/p>","protected":false},"excerpt":{"rendered":"<p>El pr\u00f3ximo viernes 18 de marzo a las 9:30 en el Sal\u00f3n de Actos del Edificio de Electr\u00f3nica y Telecomunicaci\u00f3n, el Dr. Christian De Schryver -TU Kaiserslautern, Alemania&nbsp; impartir\u00e1 un seminario sobre &quot;Aceleradores hardware basados en FPGA y sistemas h\u00edbridos&quot;. El seminario ser\u00e1 en ingl&eacute;s con el siguiente contenido: 9:30 &ndash; 10:15. Unit 1: High-Level [&hellip;]<\/p>\n","protected":false},"author":1,"featured_media":2207,"comment_status":"closed","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"_crdt_document":"","footnotes":""},"categories":[14],"tags":[],"class_list":["post-3193","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-noticias-recientes"],"yoast_head":"<!-- This site is optimized with the Yoast SEO plugin v27.3 - https:\/\/yoast.com\/product\/yoast-seo-wordpress\/ -->\n<title>IUMA Seminar Series FPGA-Based Hardware Accelerators and Hybrid Systems - Instituto Universitario de Microelectr\u00f3nica Aplicada<\/title>\n<meta name=\"robots\" content=\"index, follow, max-snippet:-1, max-image-preview:large, max-video-preview:-1\" \/>\n<link rel=\"canonical\" href=\"https:\/\/www.iuma.ulpgc.es\/en\/iuma-seminar-series-fpga-based-hardware-accelerators-and-hybrid-systems\/\" \/>\n<meta property=\"og:locale\" content=\"en_US\" \/>\n<meta property=\"og:type\" content=\"article\" \/>\n<meta property=\"og:title\" content=\"IUMA Seminar Series FPGA-Based Hardware Accelerators and Hybrid Systems - Instituto Universitario de Microelectr\u00f3nica Aplicada\" \/>\n<meta property=\"og:description\" content=\"El pr\u00f3ximo viernes 18 de marzo a las 9:30 en el Sal\u00f3n de Actos del Edificio de Electr\u00f3nica y Telecomunicaci\u00f3n, el Dr. Christian De Schryver -TU Kaiserslautern, Alemania&nbsp; impartir\u00e1 un seminario sobre &quot;Aceleradores hardware basados en FPGA y sistemas h\u00edbridos&quot;. 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