The IUMA collaborates with the SPEGC in the delivery of a course on advanced RISC-V design with FPGAs and VHDL.

25 SEP 2024
  • Share on networks:

The IUMA, through the SICAD Division (Industrial Systems and CAD) collaborates with the SPEGC (Society for the Economic Promotion of Gran Canaria) in the organisation and teaching of the course "Design of electronic systems with FPGA programmable devices and Open-Hardware RISC-V microprocessor.". This course is offered as part of the ‘Advanced Digital Skills’ programme.

The course will provide basic training for developing embedded electronic systems based on FPGA programmable hardware devices and RISC-V open hardware microprocessors.

Ofrece una formación básica en las tecnologías y técnicas de diseño y prototipado en un formato semi-presencial, compatible con el estudio o el trabajo. Las sesiones on-line síncronas, con la presencia de un profesor, proporcionan una introducción a las tecnologías, métodos y técnicas básicas, seguidas de sesiones prácticas presenciales donde los estudiantes harán diseños sobre sistemas que incluyen un dispositivo FPGA, microprocesador con arquitectura abierta RISC-V o la combinación de ambos.

The objectives to be achieved are as follows:

  • To learn basic digital design techniques using hardware description languages (VHDL, Verilog, ....).
  • To acquire theoretical and practical skills in the use of the open RISC-V architecture in real systems.
  • To Acquire the knowledge to use user-programmable FPGA hardware devices to integrate energy-efficient electronic systems by facilitating customised solutions instead of PC-based solutions.
  • To disseminate this type of methodology for its widespread use in the design of customised integrated systems, which allows the final product to be differentiated.

The course is intended for:

  • people who are interested in acquiring practical and applied skills in the design of current electronic systems using open hardware,
  • People with work experience in areas related to electronic systems in different fields (communications, industrial systems, control, energy, medical systems, audio-visual systems, etc.).

El curso se desarrollará del 28 de enero al 19 de marzo de 2025 en horario de tarde (martes a jueves de 16:30 a 20:30 horas) y el plazo de inscripción finaliza el 23 de enero de 2025 a las 12:00 horas. La inscripción se realiza a través de la web de la SPEG, en el siguiente enlace: https://www.spegc.org/formacion-y-eventos/diseno-de-sistemas-electronicos-con-dispositivos-programables-fpga-y-microprocesador-open-hardware-risc-v/